Freescale Semiconductor /MK61F15 /SIM /SCGC2

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SCGC2

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)ENET 0 (0)DAC0 0 (0)DAC1

DAC0=0, ENET=0, DAC1=0

Description

System Clock Gating Control Register 2

Fields

ENET

ENET clock gate control

0 (0): Clock is disabled.

1 (1): Clock is enabled.

DAC0

12BDAC0 clock gate control

0 (0): Clock is disabled.

1 (1): Clock is enabled.

DAC1

12BDAC1 clock gate control

0 (0): Clock is disabled.

1 (1): Clock is enabled.

Links

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